Preorder
Expected by: 01 August 2020

Analysis and Design of CMOS Clocking Circuits For Low Phase Noise

by Woorham Bae, Deog-Kyoon Jeong

As electronics continue to become faster, smaller and more efficient, development and research around clocking signals and circuits has accelerated to keep pace. This book bridges the gap between the classical theory of clocking circuits and recent technological advances, making it a useful guide for newcomers to the field, and offering an opportunity for established researchers to broaden and update their knowledge of current trends.

The book begins by introducing the theory of Fourier transform and power spectral density, then builds on this foundation in chapter 2 to define phase noise and jitter. Chapter 3 discusses the theory and primary implementation of CMOS oscillators, including LC oscillators and ring oscillators, and chapter 4 introduces techniques for analysing their phase noise and jitter. Chapters 5-7 cover conventional clocking circuits; phase-locked loop (PLL) and delay-locked loop (DLL), which suppress the phase noise of CMOS oscillators. The building blocks of conventional PLLs/DLLs are described, and the dynamics of the PLL/DLL negative feedback loop explored in depth, with practical design examples. Chapters 8-11 address state-of-the-art circuit techniques for phase noise suppression, presenting the principles and practical issues in circuit implementation of sub-sampling phase detection techniques, all-digital PLL/DLL, injection-locked oscillator, and clock multiplying DLL. Extensive survey and discussion on state-of-the-art clocking circuits and benchmarks are covered in an Appendix.

About the Author

Woorham Bae (PhD) is a senior SerDes Engineer with Ayar Labs, Santa Clara, USA. His research interests include integrated circuits for silicon photonics, high-speed I/O circuits and architectures, non-volatile memory systems, and agile hardware design methodology. Dr Bae received the IEEE Circuits and Systems Society Outstanding Young Author Award in 2018.

Deog-Kyoon Jeong is a professor at Seoul National University, South Korea. He was one of the cofounders of Silicon Image, now Lattice Semiconductor, which specialized in digital interface circuits for video displays such as DVI and HDMI. His main research interests include the design of high-speed I/O circuits, phase-locked loops, and memory system architecture.



Publication Year: 2020

Pages: 300

ISBN-13: 978-1-78561-801-7

Format: HBK

Available Formats

Recommendations For You

Purchased With